BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W von Ando, Kota, Ueyoshi, Kodai, Orimo, Kentaro, Yonekawa, Haruyoshi, Sato, Shimpei, Nakahara, Hiroki, Takamaeda-Yamazaki, Shinya, Ikebe, Masayuki, Asai, Tetsuya, Kuroda, Tadahiro, Motomura, Masato

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A molecular neuromorphic network device consisting of single-walled carbon nanotubes complexed with polyoxometalate von Tanaka, Hirofumi, Akai-Kasaya, Megumi, TermehYousefi, Amin, Hong, Liu, Fu, Lingxiang, Tamukoh, Hakaru, Tanaka, Daisuke, Asai, Tetsuya, Ogawa, Takuji

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Physical Implementation of Reservoir Computing through Electrochemical Reaction von Kan, Shaohua, Nakajima, Kohei, Asai, Tetsuya, Akai‐Kasaya, Megumi

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Extending Binary Neural Networks to Bayesian Neural Networks with Probabilistic Interpretation of Binary Weights von SAITO, Taisei, ANDO, Kota, ASAI, Tetsuya

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An Adaptive Global and Local Tone Mapping Algorithm Implemented on FPGA von Ambalathankandy, Prasoon, Ikebe, Masayuki, Yoshida, Takayuki, Shimada, Takeshi, Takamaeda, Shinya, Motomura, Masato, Asai, Tetsuya

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Simple Reservoir Computing Capitalizing on the Nonlinear Response of Materials: Theory and Physical Implementations von Kan, Shaohua, Nakajima, Kohei, Takeshima, Yuki, Asai, Tetsuya, Kuwahara, Yuji, Akai-Kasaya, Megumi

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Highly-integrable analogue reservoir circuits based on a simple cycle architecture von Abe, Yuki, Nakada, Kazuki, Hagiwara, Naruki, Suzuki, Eiji, Suda, Keita, Mochizuki, Shin-ichiro, Terasaki, Yukio, Sasaki, Tomoyuki, Asai, Tetsuya

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Holmes: A Hardware-Oriented Optimizer Using Logarithms von YAMAGISHI, Yoshiharu, KANEKO, Tatsuya, AKAI-KASAYA, Megumi, ASAI, Tetsuya

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Evolving conductive polymer neural networks on wetware von Akai-Kasaya, Megumi, Hagiwara, Naruki, Hikita, Wataru, Okada, Masaru, Sugito, Yasumasa, Kuwahara, Yuji, Asai, Tetsuya

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Long- and Short-Term Conductance Control of Artificial Polymer Wire Synapses von Hagiwara, Naruki, Sekizaki, Shoma, Kuwahara, Yuji, Asai, Tetsuya, Akai-Kasaya, Megumi

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A 1-Msps 500-Node FORCE Learning Accelerator for Reservoir Computing von Yoshida, Kose, Akai-Kasaya, Megumi, Asai, Tetsuya

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Formation and characterization of charge coupled structure of polyoxometalate particles and a GaAs-based nanowire for readout of molecular charge states von Sasaki, Kentaro, Okamoto, Shoma, Tashiro, Shohei, Asai, Tetsuya, Kasai, Seiya

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FPGA-Based Annealing Processor with Time-Division Multiplexing von YAMAMOTO, Kasho, IKEBE, Masayuki, ASAI, Tetsuya, MOTOMURA, Masato, TAKAMAEDA-YAMAZAKI, Shinya

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Low-power temperature-to-frequency converter consisting of subthreshold CMOS circuits for integrated smart temperature sensors von Ueno, Ken, Asai, Tetsuya, Amemiya, Yoshihito

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Applying a Molecular Device to Stochastic Computing Operation for a Hardware AI System Design von Kan, Shaohua, Sasaki, Yoshiaki, Asai, Tetsuya, Akai-Kasaya, Megumi

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Reservoir Computing on Atomic Switch Arrays with High Precision and Excellent Memory Characteristics von Kubota, Hiroshi, Hasegawa, Tsuyoshi, Akai-Kasaya, Megumi, Asai, Tetsuya

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A Hardware-efficient Weight Sampling Circuit for Bayesian Neural Networks von Hirayama, Yuki, Asai, Tetsuya, Motomura, Masato, Takamaeda, Shinya

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Error Tolerance Analysis of Deep Learning Hardware Using a Restricted Boltzmann Machine Toward Low-Power Memory Implementation von Marukame, Takao, Ueyoshi, Kodai, Asai, Tetsuya, Motomura, Masato, Schmid, Alexandre, Suzuki, Masamichi, Higashi, Yusuke, Mitani, Yuichiro

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Real-time HDTV to 4K and 8K-UHD conversions using anti-aliasing based super resolution algorithm on FPGA von Ambalathankandy, Prasoon, Takamaeda, Shinya, Masato, Motomura, Asai, Tetsuya, Ikebe, Masayuki, Kusano, Hotaka

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Vibration Suppression Control Using an Equivalent Rigid-Body Observer von Yoshiura, Yasufumi, Kawahara, Shouta, Horimai, Daichi, Asai, Tetsuya, Kaku, Yasuhiko

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