Operating System for Runtime Reconfigurable Multiprocessor Systems von Göhringer, Diana, Hübner, Michael, Nguepi Zeutebouo, Etienne, Becker, Jürgen

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FlexScore: Quantifying Flexibility von Tan, Tian, Nurvitadhi, Eriko, Dasu, Aravind, Langhammer, Martin, Chiou, Derek

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The Potential for a GPU-Like Overlay Architecture for FPGAs von Kingyens, Jeffrey, Steffan, J. Gregory

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A wavelet-based sprite codec von Dasu, A.R., Panchanathan, S.

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A Streaming High-Throughput Linear Sorter System with Contention Buffering von Ortiz, Jorge, Andrews, David

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Floorplacement for Partial Reconfigurable FPGA-Based Systems von Montone, A., Santambrogio, Marco D., Redaelli, F., Sciuto, D.

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Analysis of Power Delivery Network (PDN) in Bridge-Chips for 2.5-D Heterogeneous Integration von Hossen, Md Obaidul, Kaul, Ankit, Nurvitadhi, Eriko, Pant, Mondira Deb, Gutala, Ravi, Dasu, Aravind, Bakir, Muhannad S.

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Analysis and Design of a Context Adaptable SAD/MSE Architecture von Sudarsanam, Arvind, Dasu, Aravind, Vaithianathan, Karthik

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A Vector-Like Reconfigurable Floating-Point Unit for the Logarithm von Alachiotis, Nikolaos, Stamatakis, Alexandros

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Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010) von Dasu, Aravind, Cardoso, Joao M. P., Bozorgzadeh, Eli, Becker, Juergen

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Boosting Parallel Applications Performance on Applying DIM Technique in a Multiprocessing Environment von Rutzig, Mateus B., Beck, Antonio C. S., Madruga, Felipe, Alves, Marco A., Freitas, Henrique C., Maillard, Nicolas, Navaux, Philippe O. A., Carro, Luigi

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Microfluidic Cooling of a 14-nm 2.5-D FPGA With 3-D Printed Manifolds for High-Density Computing: Design Considerations, Fabrication, and Electrical Characterization von Sarvey, Thomas E., Kaul, Ankit, Rajan, Sreejith Kochupurackal, Dasu, Aravind, Gutala, Ravi, Bakir, Muhannad S.

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Monolithic Integration of a Micropin-Fin Heat Sink in a 28-nm FPGA von Sarvey, Thomas E., Yang Zhang, Cheung, Colman, Gutala, Ravi, Rahman, Arifur, Dasu, Aravind, Bakir, Muhannad S.

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Specializing FGPU for Persistent Deep Learning von Ma, Rui, Hsu, Jia-Ching, Tan, Tian, Nurvitadhi, Eriko, Sheffield, David, Pelt, Rob, Langhammer, Martin, Sim, Jaewoong, Dasu, Aravind, Chiou, Derek

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A Faddeev Systolic Array for EKF-SLAM and its Arithmetic Data Representation Impact on FPGA von de Souza Rosa, Leandro, Dasu, Aravind, C. Diniz, Pedro, Bonato, Vanderlei

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PRR-PRR Dynamic Relocation von Sudarsanam, Arvind, Kallam, Ramachandra, Dasu, Aravind

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A thermal–mechanical coupled finite element model with experimental temperature verification for vertically stacked FPGAs von Zhang, Chunbo (Sam), Kallam, Ramachandra, Deceuster, Andrew, Dasu, Aravind, Li, Leijun

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Analysis and Design of a Context Adaptable SAD/MSE Architecture von Sudarsanam, Arvind, Dasu, Aravind, Vaithianathan, Karthik

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Active interposer for localized programmable integrated circuit reconfiguration von McElheny, Peter John, Dasu, Aravind

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Data storage for accelerating functions von Gutala, Ravi, Dasu, Aravind

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