Probability density function modeling for sub-powered interconnects von Pater, Flavius, Amaricăi, Alexandru

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Quantum circuit’s reliability assessment with VHDL-based simulated fault injection von Boncalo, Oana, Amăricăi, Alexandru, Udrescu, Mihai, Vlăduţiu, Mircea

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Low-precision DSP-based floating-point multiply-add fused for Field Programmable Gate Arrays von Amaricai, Alexandru, Boncalo, Oana, Gavriliu, Constantina-Elena

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Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation von Boncalo, Oana, Kolumban-Antal, Gyorgy, Amaricai, Alexandru, Savin, Valentin, Declercq, David

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Fault Tolerant Digital Data-Path Design via Control Feedback Loops von Boncalo, Oana, Amaricai, Alexandru, Lendek, Zsófia

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Memory trade-offs in layered self-corrected min-sum LDPC decoders von Boncalo, Oana, Amaricai, Alexandru, Mihancea, Petru Florin, Savin, Valentin

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Iterative Gradient Descent Decoding for Real Number LDPC Codes von Boncalo, Oana, Amaricai, Alexandru

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Design Issues and Implementations for Floating-Point Divide-Add Fused von Amaricai, Alexandru, Vladutiu, Mircea, Boncalo, Oana

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Using Simulated Fault Injection for Fault Tolerance Assessment of Quantum Circuits von Boncalo, O., Udrescu, M., Prodan, L., Vladutiu, M., Amaricai, A.

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Multi-Level Simulated Fault Injection for Data Dependent Reliability Analysis of RTL Circuit Descriptions von NIMARA, S., AMARICAI, A., BONCALO, O., POPA, M.

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Iterative Gradient Descent Decoding for Real Number LDPC Codes von Boncalo, Oana, Amaricai, Alexandru

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SYSTEM AND METHOD FOR REDUCING ERRORS OCCURRING IN DATA PROCESSING UNITS IMPLEMENTED WITH DIGITAL CIRCUITS von AMĂRICĂI - BONCALO ALEXANDRU, AMĂRICĂI - BONCALO OANA, LENDEK ZSOFIA

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Design Trade‐Offs for FPGA Implementation of LDPC Decoders von Amaricai, Alexandru

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Assessing quantum circuits reliability with mutant-based simulated fault injection von Boncalo, O., Udrescu, M., Prodan, L., Vladutiu, M., Amaricai, A.

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Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting von Marcu, Marius, Boncalo, Oana, Ghenea, Madalin, Amaricai, Alexandru, Weinstock, Jan, Leupers, Rainer, Wang, Zheng, Georgakoudis, Giorgis, Nikolopoulos, Dimitrios S., Cernazanu-Glavan, Cosmin, Bara, Lucian, Ionascu, Marian

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Design of Addition and Multiplication Units for High Performance Interval Arithmetic Processor von Amaricai, A., Vladutiu, M., Prodan, L., Udrescu, M., Boncalo, O.

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Simulated Fault Injection for Quantum Circuits Based on Simulator Commands von Boncalo, O., Udrescu, M., Prodan, L., Vladutiu, M., Amaricai, A.

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SYSTEM AND METHOD FOR REDUCING ERRORS OCCURRING IN DATA PROCESSING UNITS IMPLEMENTED WITH DIGITAL CIRCUITS von AMĂRICĂI - BONCALO ALEXANDRU, AMĂRICĂI - BONCALO OANA, LENDEK ZSOFIA

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FPGA implementation of very high radix square root with prescaling von Amaricai, A., Boncalo, O.

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FPGA implementation of hybrid fixed point - Floating point multiplication von Amaricai, Alexandru, Boncalo, Oana, Sicoe, Ovidiu, Marcu, Marius

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