Treffer 1 - 7 von 7 für Suche 'Ahmed, Shafquat Jahan', Suchdauer: 0,33s Treffer weiter einschränken
  1. 1
    SRAM CELL LAYOUT INCLUDING ARRANGEMENT OF MULTIPLE ACTIVE REGIONS AND MULTIPLE GATE REGIONS

    SRAM CELL LAYOUT INCLUDING ARRANGEMENT OF MULTIPLE ACTIVE REGIONS AND MULTIPLE GATE REGIONS von JANARDAN, Dhori Kedar, AHMED, Shafquat Jahan

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  2. 2
    SRAM cell layout including arrangement of multiple active regions and multiple gate regions

    SRAM cell layout including arrangement of multiple active regions and multiple gate regions von Dhori, Kedar Janardan, Ahmed, Shafquat Jahan

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  3. 3
    SRAM LAYOUT WITH SMALL FOOTPRINT AND EFFICIENT ASPECT RATIO

    SRAM LAYOUT WITH SMALL FOOTPRINT AND EFFICIENT ASPECT RATIO von AHMED, Shafquat Jahan, DHORI, Kedar Janardan

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  4. 4
    SILICON-ON-INSULATOR SEMICONDUCTOR DEVICE WITH A STATIC RANDOM ACCESS MEMORY CIRCUIT

    SILICON-ON-INSULATOR SEMICONDUCTOR DEVICE WITH A STATIC RANDOM ACCESS MEMORY CIRCUIT von Lecocq, Christophe, Weber, Olivier, Dhori, Kedar Janardan, Kumar, Promod, Ahmed, Shafquat Jahan, Urard, Pascal

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  5. 5
    Memory cell and memory cell array

    Memory cell and memory cell array von DHORI KEDAR JANARDAN, AHMED SHAFQUAT JAHAN

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  6. 6
    SRAM LAYOUT WITH SMALL AREA AND EFFICIENT ASPECT RATIO

    SRAM LAYOUT WITH SMALL AREA AND EFFICIENT ASPECT RATIO von DHORI KEDAR JANARDAN, AHMED SHAFQUAT JAHAN

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  7. 7
    SILICON-ON-INSULATOR SEMICONDUCTOR DEVICE INCLUDING A STATIC RANDOM ACCESS MEMORY CIRCUIT, AND CORRESPONDING MANUFACTURING METHOD

    SILICON-ON-INSULATOR SEMICONDUCTOR DEVICE INCLUDING A STATIC RANDOM ACCESS MEMORY CIRCUIT, AND CORRESPONDING MANUFACTURING METHOD von Lecocq, Christophe, Weber, Olivier, Dhori, Kedar Janardan, Kumar, Promod, Ahmed, Shafquat Jahan, Urard, Pascal

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