Effect of stress voltages on voltage acceleration and lifetime projections for ultra-thin gate oxides von Abadeer, W.W.

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Comprehensive gate-oxide reliability evaluation for dram processes von Vollertsen, R.-P., Abadeer, W.W.

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Modelling considerations and development of upper limits of stress conditions for dielectric breakdown projections von Vollertsen, R.-P., Abadeer, W.W.

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Long-term bias temperature reliability of P+ polysilicon gated FET devices von ABADEER, W. W, TONTI, W. R, HÄNSCH, W. E, SCHWALKE, U

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Investigation of Plasma Charging damage impact on device and gate dielectric reliability in 180nm SOI CMOS RF switch technology von Ioannou, D.P., Harmon, D., Abadeer, W.

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Physical mechanisms of dielectric breakdown in SiO2 for the range of −150°C to 150°C von Abadeer, W. W., Vollertsen, R.-P.

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A capacitance reliability degradation mechanism in Hyper-abrupt junction varactors von Abadeer, W., Rassel, R., Johnson, J.B.

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Structural dependence of dielectric breakdown in ultra-thin gate oxides and its relationship to soft breakdown modes and device failure von Wu, E., Nowak, E., Aitken, J., Abadeer, W., Han, L.K., Lo, S.

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Reliability monitoring and screening issues with ultrathin gate dielectric devices von Abadeer, W.W.

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Challenges for accurate reliability projections in the ultra-thin oxide regime von Wu, E.Y., Abadeer, W.W., Liang-Kai Han, Shin-Hsien Lo, Hueckel, G.R.

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Statistical Evaluation of Learning Factor in Reliability Studies von Abadeer, W. W.

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Modelling considerations and development of upper limits of stress conditions for dielectric breakdown projections: Reliability physics of advanced electron devices von VOLLERTSEN, R.-P, ABADEER, W. W

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Mechanism of Stress-Induced Leakage Due to Plasma Charging and Effect of Oxide Thickness von Abadeer, W., Hueckel, G., Acovic, A., Ray, A.

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A Thin-Film SOI 180nm CMOS RF Switch Technology von Botula, A., Joseph, A., Slinkman, J., Wolf, R., He, Z.-X., Ioannou, D., Wagner, L., Gordon, M., Abou-Khalil, M., Phelps, R., Gautsch, M., Abadeer, W., Harmon, D., Levy, M., Benoit, J., Dunn, J.

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Determination of ultra-thin oxide voltages and thickness and the impact on reliability projection von Wu, E., Lo, S.H., Abadeer, W., Acovic, A., Buchanan, D., Furukawa, T., Brochu, D., Dufresne, R.

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Long-term bias temperature reliability of P(+) polysilicongated FET devices von Abadeer, W W, Tonti, W R, Hansch, W E, Schwalke, U

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Gate Material Dependence Of Process Charging Damage In Thin Gate Oxide von Acovic, A., Ray, A., Sun, J., Herman, J., Furukawa, T., Geiger, R., Beyer, K., McGahay, V., Greco, S., Abadeer, W.

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Structure, design structure and process for increasing magnitude of device threshold voltage for low power applications von ABADEER WAGDI W

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A CMOS IMAGING SENSOR von ABADEER, WAGDI W

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A CMOS IMAGING SENSOR von ABADEER, WAGDI W

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