Symbolic Representation of Time Petri Nets for Efficient Bounded Model Checking von IGAWA, Nao, YOKOGAWA, Tomoyuki, AMASAKI, Sousuke, KONDO, Masafumi, SATO, Yoichiro, ARIMOTO, Kazutami

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An accurate method for predicting temperature-dependent current mismatch in weak inversion region of long and wide channel MOSFET without subthreshold hump von Sakakibara, Kiyohiko, Arimoto, Kazutami

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Synthesis and Consistency Verification of UML Sequence Diagrams with Hierarchical Structure von Yokogawa, Tomoyuki, Matsumoto, Akira, Amasaki, Sousuke, Aman, Hirohisa, Arimoto, Kazutami

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Prospects for IoT-based Local Data Distribution System for Local Production for Local Consumption (Case: Dynamic Map Collection and Distribution System) von Miyata, Hiroshi, Arimoto, Kazutami, Yokogawa, Tomoyuki

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A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals von KAWAMURA, Yoshifumi, OKADA, Naoya, MATSUDA, Yoshio, MATSUMURA, Tetsuya, MAKINO, Hiroshi, ARIMOTO, Kazutami

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High-Speed Performance Evaluation of a Large-Scale Shared-Bus Digital System von KONDO, MASAFUMI, YOKOGAWA, TOMOYUKI, SATO, YOICHIRO, ARIMOTO, KAZUTAMI

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Low Power Platform for Embedded Processor LSIs von SHIMIZU, Toru, ARIMOTO, Kazutami, NISHII, Osamu, OTANI, Sugako, KONDO, Hiroyuki

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A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals von Kawamura, Yoshifumi, Okada, Naoya, Matsuda, Yoshio, Matsumura, Tetsuya, Makino, Hiroshi, Arimoto, Kazutami

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The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture von Noda, H., Nakajima, M., Dosaka, K., Nakata, K., Higashida, M., Yamamoto, O., Mizumoto, K., Tanizaki, T., Gyohten, T., Okuno, Y., Kondo, H., Shimazu, Y., Arimoto, K., Saito, K., Shimizu, T.

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On-Chip Memory Power-Cut Scheme Suitable for Low Power SoC Platform von SHIMANO, Hiroki, MORISHITA, Fukashi, DOSAKA, Katsumi, ARIMOTO, Kazutami

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Low-Power On-Chip Charge-Recycling DC-DC Conversion Circuit and System von Ueda, Kazuhiro, Morishita, Fukashi, Okura, Shunsuke, Okamura, Leona, Yoshihara, Tsutomu, Arimoto, Kazutami

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A Continuous-Adaptive DDRx Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test von HARAGUCHI, Masaru, OSAWA, Tokuya, YAMAZAKI, Akira, MORISHIMA, Chikayoshi, MORIHARA, Toshinori, MOROOKA, Yoshikazu, OKUNO, Yoshihiro, ARIMOTO, Kazutami

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An Evaluation of Visual Modelling Environment for the nuXmv Model Checker von Mizumoto, Takumi, Yokogawa, Tomoyuki, Amasaki, Sousuke, Aman, Hirohisa, Arimoto, Kazutami

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Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor von KUMAKI, Takeshi, ISHIZAKI, Masakatsu, KOIDE, Tetsushi, MATTAUSCH, Hans Jürgen, KURODA, Yasuto, GYOHTEN, Takayuki, NODA, Hideyuki, DOSAKA, Katsumi, ARIMOTO, Kazutami, SAITO, Kazunori

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A Performance Evaluation Tool of GALS Systems for Design Optimization von KONDO, Masafumi, YOKOGAWA, Tomoyuki, SATO, Yoichiro, ARIMOTO, Kazutami

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opening von Arimoto, Kazutami

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Introduction to the Special Issue on the 2009 IEEE International Solid-State Circuits Conference von Alvandpour, Atila, Arimoto, Kazutami, Cantatore, Eugenio, Zhang, Kevin

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A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture von Noda, H., Inoue, K., Kuroiwa, M., Igaue, F., Yamamoto, K., Mattausch, H.J., Koide, T., Amo, A., Hachisuka, A., Soeda, S., Hayashi, I., Morishita, F., Dosaka, K., Arimoto, K., Fujishima, K., Anami, K., Yoshihara, T.

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Advanced Multi-core Technology for High Speed Signal Processing at Embedded System von ARIMOTO, Kazutami

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Introduction to the Special Issue on the 2010 IEEE International Solid-State Circuits Conference von Arimoto, Kazutami, Takeuchi, Ken, Karnik, Tanay, Makinwa, Kofi A. A., Burdett, Alison

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