Addressing failures in exascale computing von Snir, Marc, Wisniewski, Robert W, Abraham, Jacob A, Adve, Sarita V, Bagchi, Saurabh, Balaji, Pavan, Belak, Jim, Bose, Pradip, Cappello, Franck, Carlson, Bill, Chien, Andrew A, Coteus, Paul, DeBardeleben, Nathan A, Diniz, Pedro C, Engelmann, Christian, Erez, Mattan, Fazzari, Saverio, Geist, Al, Gupta, Rinku, Johnson, Fred, Krishnamoorthy, Sriram, Leyffer, Sven, Liberty, Dean, Mitra, Subhasish, Munson, Todd, Schreiber, Rob, Stearley, Jon, Hensbergen, Eric Van

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ILLIXR: An Open Testbed to Enable Extended Reality Systems Research von Huzaifa, Muhammad, Desai, Rishi, Grayson, Samuel, Jiang, Xutao, Jing, Ying, Lee, Jae, Lu, Fang, Pang, Yihan, Ravichandran, Joseph, Sinclair, Finn, Tian, Boyuan, Yuan, Hengzhi, Zhang, Jeffrey, Adve, Sarita V.

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Inter-kernel Reuse-aware Thread Block Scheduling von Huzaifa, Muhammad, Alsop, Johnathan, Mahmoud, Abdulrahman, Salvador, Giordano, Sinclair, Matthew D., Adve, Sarita V.

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DeNovoND: Efficient Hardware for Disciplined Nondeterminism von Sung, Hyojin, Komuravelli, Rakesh, Adve, Sarita V.

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Relyzer: Application Resiliency Analyzer for Transient Faults von Sastry Hari, Siva Kumar, Adve, S. V., Naeimi, H., Ramachandran, P.

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DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism von Byn Choi, Komuravelli, R., Hyojin Sung, Smolinski, R., Honarmand, N., Adve, S. V., Adve, V. S., Carter, N. P., Ching-Tsun Chou

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Shared memory consistency models: a tutorial von Adve, S.V., Gharachorloo, K.

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Understanding the Propagation of Hard Errors to Software and Implications for Resilient System Design von LI, Man-Lap, RAMACHANDRAN, Pradeep, SAHOO, Swamp K, ADVE, Sarita V, ADVE, Vikram S, YUANYUAN ZHOU

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Revisiting the Complexity of Hardware Cache Coherence and Some Implications von Komuravelli, Rakesh, Adve, Sarita V., Chou, Ching-Tsun

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Lifetime reliability: toward an architectural solution von Jayanth Srinivasan, Adve, S.V., Pradip Bose, Rivers, J.A.

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The Case for Lifetime Reliability-Aware Microprocessors von Srinivasan, Jayanth, Adve, Sarita V., Bose, Pradip, Rivers, Jude A.

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Rsim: simulating shared-memory multiprocessors with ILP processors von Hughes, C.J., Pai, V.S., Ranganathan, P., Adve, S.V.

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Hardware Fault Recovery for I/O Intensive Applications von Ramachandran, Pradeep, Hari, Siva Kumar Sastry, Li, Manlap, Adve, Sarita V.

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Exploiting Structural Duplication for Lifetime Reliability Enhancement von Srinivasan, Jayanth, Adve, Sarita V., Bose, Pradip, Rivers, Jude A.

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Cross-component energy management: Joint adaptation of processor and memory von Li, Xiaodong, Gupta, Ritu, Adve, Sarita V., Zhou, Yuanyuan

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Foundations of the C++ concurrency memory model von Boehm, Hans-J., Adve, Sarita V.

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Memory-side prefetching for linked data structures for processor-in-memory systems von Hughes, Christopher J., Adve, Sarita V.

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The Java memory model von Manson, Jeremy, Pugh, William, Adve, Sarita V

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Low-cost program-level detectors for reducing silent data corruptions von Hari, S. K. S., Adve, S. V., Naeimi, H.

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Understanding the propagation of hard errors to software and implications for resilient system design von Li, Man-Lap, Ramachandran, Pradeep, Sahoo, Swarup Kumar, Adve, Sarita V., Adve, Vikram S., Zhou, Yuanyuan

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