InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature von Alian, A., Mols, Y., Bordallo, C. C. M., Verreck, D., Verhulst, A., Vandooren, A., Rooyackers, R., Agopian, P. G. D., Martino, J. A., Thean, A., Lin, D., Mocuta, D., Collaert, N.

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Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs von Vandooren, A., Leonelli, D., Rooyackers, R., Hikavyy, A., Devriendt, K., Demand, M., Loo, R., Groeseneken, G., Huyghebaert, C.

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Impact of process and geometrical parameters on the electrical characteristics of vertical nanowire silicon n-TFETs von Vandooren, A., Leonelli, D., Rooyackers, R., Arstila, K., Groeseneken, G., Huyghebaert, C.

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3-D Sequential Stacked Planar Devices Featuring Low-Temperature Replacement Metal Gate Junctionless Top Devices With Improved Reliability von Vandooren, A., Franco, J., Parvais, B., Wu, Z., Witters, L., Walke, A., Li, W., Peng, L., Deshpande, V., Bufler, F. M., Rassoul, N., Hellings, G., Jamieson, G., Inoue, F., Verbinnen, G., Devriendt, K., Teugels, L., Heylen, N., Vecchio, E., Zheng, T., Rosseel, E., Vanherle, W., Hikavyy, A., Chan, B. T., Ritzenthaler, R., Besnard, G., Schwarzenbach, W., Gaudin, G., Radu, I., Nguyen, B.-Y., Waldron, N., De Heyn, V., Mocuta, D., Collaert, N.

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Drive current enhancement in p-tunnel FETs by optimization of the process conditions von Leonelli, D., Vandooren, A., Rooyackers, R., De Gendt, S., Heyns, M.M., Groeseneken, G.

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Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures von Martino, M D V, Martino, J A, Agopian, P G D, Vandooren, A, Rooyackers, R, Simoen, E, Claeys, C

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Performance of TFET and FinFET devices applied to current mirrors for different dimensions and temperatures von Martino, M D V, Martino, J A, Agopian, P G D, Vandooren, A, Rooyackers, R, Simoen, E, Thean, A, Claeys, C

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Observation of diameter dependent carrier distribution in nanowire-based transistors von Schulze, A, Hantschel, T, Eyben, P, Verhulst, A S, Rooyackers, R, Vandooren, A, Mody, J, Nazir, A, Leonelli, D, Vandervorst, W

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Quantitative three-dimensional carrier mapping in nanowire-based transistors using scanning spreading resistance microscopy von Schulze, A., Hantschel, T., Eyben, P., Verhulst, A.S., Rooyackers, R., Vandooren, A., Vandervorst, W.

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In situ UHVEM irradiation study of intrinsic point defect behavior in Si nanowire structures von Vanhellemont, J., Anada, S., Nagase, T., Yasuda, H., Bender, H., Rooyackers, R., Vandooren, A.

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Nanoprober-based EBIC measurements for nanowire transistor structures von Arstila, K., Hantschel, T., Schulze, A., Vandooren, A., Verhulst, A.S., Rooyackers, R., Eyben, P., Vandervorst, W.

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Impact of dopants and silicon structure dimensions on {113}-defect formation during 2 MeV electron irradiation in an UHVEM von Vanhellemont, J., Anada, S., Nagase, T., Yasuda, H., Schulze, A., Bender, H., Rooyackers, R., Vandooren, A.

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Debilitating diarrhoea and weight loss due to colitis in two RA patients treated with leflunomide von Verschueren, P, Vandooren, A K, Westhovens, R

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Coupling effects and channels separation in FinFETs von Daugé, F., Pretet, J., Cristoloveanu, S., Vandooren, A., Mathew, L., Jomaah, J., Nguyen, B.-Y.

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Coupling effect between the front and back interfaces in thin SOI MOSFETs von Ohata, A., Cristoloveanu, S., Vandooren, A., Cassé, M., Daugé, F.

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Optimization of tunnel FETs: Impact of gate oxide thickness, implantation and annealing conditions von Leonelli, D, Vandooren, A, Rooyackers, R, De Gendt, S, Heyns, M M, Groeseneken, G

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Novel architecture to boost the vertical tunneling in Tunnel Field Effect Transistors von Leonelli, D., Vandooren, A., Rooyackers, R., Verhulst, A. S., Huyghebaert, C., De Gendt, S., Heyns, M. M., Groeseneken, G.

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Fully-depleted SOI devices with TaSiN gate, HfO2 gate dielectric, and elevated source/drain extensions von Vandooren, A., Barr, A., Mathew, L., White, T.R., Egley, S., Pham, D., Zavala, M., Samavedam, S., Schaeffer, J., Conner, J., Nguyen, B.-Y., White, B.E., Orlowski, M.K., Mogab, J.

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Back-gate and series resistance effects in LDMOSFETs on SOI von Vandooren, A., Cristoloveanu, S., Mojarradi, M., Kolawa, E.

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On the Impact of the Gate Work-Function Metal on the Charge Trapping Component of NBTI and PBTI von Franco, J, Wu, Z, Rzepa, G, Ragnarsson, L.-A, Dekkers, H, Vandooren, A, Groeseneken, G, Horiguchi, N, Collaert, N, Linten, D, Grasser, T, Kaczer, B

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