Robust Contactless Noncircular Choke Flange for Wideband Waveguide Applications von Pyne, Budhaditya, Naruse, Ryohei, Saito, Hirobumi, Hirokawa, Jiro, Ravindra, Vinay, Akbar, Prilando Riziki

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Slot-Array Antenna Feeder Network for Space-Borne X -Band Synthetic Aperture Radar von Pyne, Budhaditya, Akbar, Prilando Rizki, Ravindra, Vinay, Saito, Hirobumi, Hirokawa, Jiro, Fukami, Tomoya

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Parallel-Plate Slot Array Antenna for Deployable SAR Antenna Onboard Small Satellite von Akbar, Prilando Rizki, Saito, Hirobumi, Miao Zhang, Hirokawa, Jiro, Ando, Makoto

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A Dual-Polarization X -Band Traveling-Wave Antenna Panel for Small-Satellite Synthetic Aperture Radar von Ravindra, Vinay, Akbar, Prilando Rizki, Miao Zhang, Hirokawa, Jiro, Saito, Hirobumi, Oyama, Akira

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Development and on-orbit operation of lithium-ion pouch battery for small scientific satellite “REIMEI” von Uno, Masatoshi, Ogawa, Keita, Takeda, Yasuo, Sone, Yoshitsugu, Tanaka, Koji, Mita, Makoto, Saito, Hirobumi

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A TM010 Cavity Power-Combiner with Microstrip Line Inputs von RAVINDRA, Vinay, SAITO, Hirobumi, HIROKAWA, Jiro, ZHANG, Miao, TOMIKI, Atsushi

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Impact of Heavy Ion Energy and Nuclear Interactions on Single-Event Upset and Latchup in Integrated Circuits von Dodd, P.E., Schwank, J.R., Shaneyfelt, M.R., Felix, J.A., Paillet, P., Ferlet-Cavrois, V., Baggio, J., Reed, R.A., Warren, K.M., Weller, R.A., Schrimpf, R.D., Hash, G.L., Dalton, S.M., Hirose, K., Saito, H.

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Compact X-Band Synthetic Aperture Radar for 100kg Class Satellite von SAITO, Hirobumi, AKBAR, Prilando Rizki, WATANABE, Hiromi, RAVINDRA, Vinay, HIROKAWA, Jiro, URA, Kenji, BUDHADITYA, Pyne

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Long Term Operability of Li-ion Battery under Micro-gravity Condition Demonstrated by the Satellite “REIMEI” von SONE, Yoshitsugu, WATANABE, Hiromi, TANAKA, Kohei, FUKUDA, Seisuke, OGAWA, Keita, ASAMURA, Kazushi, YAMAZAKI, Atsushi, NAGAMATSU, Hiroyuki, FUKUSHIMA, Yosuke, SAITO, Hirofumi

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Cycle life evaluation of 3 Ah LixMn2O4-based lithium-ion secondary cells for low-earth-orbit satellites I. Full cell results von BROWN, Shelley, OGAWA, Keita, KUMEUCHI, Youichi, ENOMOTO, Shinsuke, UNO, Masatoshi, SAITO, Hirobumi, SONE, Yoshitsugu, ABRAHAM, Daniel, LINDBERGH, Göran

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LET Dependence of Single Event Transient Pulse-Widths in SOI Logic Cell von Makino, T., Kobayashi, D., Hirose, K., Yanagawa, Y., Saito, H., Ikeda, H., Takahashi, D., Ishii, S., Kusano, M., Onoda, S., Hirao, T., Ohshima, T.

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Waveform Observation of Digital Single-Event Transients Employing Monitoring >Transistor Technique von Kobayashi, D., Hirose, K., Yanagawa, Y., Ikeda, H., Saito, H., Ferlet-Cavrois, V., McMorrow, D., Gaillardin, M., Paillet, P., Arai, Y., Ohno, M.

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Navigation Message Decoding for Rocket-Borne GPS Receivers von HARIMA, Ken, SAITO, Hirobumi, EBINUMA, Takuji

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20aTK-8 極低温における3次元量子磁束液体相と乱れの効果 von 東郷, 諭, 森田, 真規子, 齋藤, 文宏, 大熊, 哲

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Heavy Ion Energy Effects in CMOS SRAMs von Dodd, P.E., Schwank, J.R., Shaneyfelt, M.R., Ferlet-Cavrois, V., Paillet, P., Baggio, J., Hash, G.L., Felix, J.A., Hirose, K., Saito, H.

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A New Technique for SET Pulse Width Measurement in Chains of Inverters Using Pulsed Laser Irradiation von Ferlet-Cavrois, V., McMorrow, D., Kobayashi, D., Fel, N., Melinger, J.S., Schwank, J.R., Gaillardin, M., Pouget, V., Essely, F., Baggio, J., Girard, S., Flament, O., Paillet, P., Flores, R.S., Dodd, P.E., Shaneyfelt, M.R., Hirose, K., Saito, H.

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Direct Measurement of SET Pulse Widths in 0.2-$\mu$m SOI Logic Cells Irradiated by Heavy Ions von Yanagawa, Y., Hirose, K., Saito, H., Kobayashi, D., Fukuda, S., Ishii, S., Takahashi, D., Yamamoto, K., Kuroda, Y.

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SEU resistance in advanced SOI-SRAMs fabricated by commercial technology using a rad-hard circuit design von Hirose, K., Saito, H., Kuroda, Y., Ishii, S., Fukuoka, Y., Takahashi, D.

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Neutron and proton-induced single event upsets in advanced commercial fully depleted SOI SRAMs von Baggio, J., Ferlet-Cavrois, V., Lambert, D., Paillet, P., Wrobel, F., Hirose, K., Saito, H., Blackmore, E.W.

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Experimental Verification of Scan-Architecture-Based Evaluation Technique of SET and SEU Soft-Error Rates at Each Flip-Flop in Logic VLSI Systems von Yanagawa, Y., Kobayashi, D., Hirose, K., Makino, T., Saito, H., Ikeda, H., Onoda, S., Hirao, T., Ohshima, T.

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